diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
index a471573..04277b1 100644
--- a/drivers/net/xilinx_axi_emac.c
+++ b/drivers/net/xilinx_axi_emac.c
@@ -19,6 +19,7 @@
 #include <miiphy.h>
 #include <wait_bit.h>
 #include <linux/delay.h>
+#include <eth_phy.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -295,6 +296,9 @@
 	/* Set default MDIO divisor */
 	writel(XAE_MDIO_DIV_DFT | XAE_MDIO_MC_MDIOEN_MASK, &regs->mdio_mc);
 
+	if (IS_ENABLED(CONFIG_DM_ETH_PHY))
+		priv->phyaddr = eth_phy_get_addr(dev);
+
 	if (priv->phyaddr == -1) {
 		/* Detect the PHY address */
 		for (i = 31; i >= 0; i--) {
@@ -778,18 +782,29 @@
 		priv->phy_of_handle = plat->phy_of_handle;
 		priv->interface = pdata->phy_interface;
 
-		priv->bus = mdio_alloc();
-		priv->bus->read = axiemac_miiphy_read;
-		priv->bus->write = axiemac_miiphy_write;
-		priv->bus->priv = priv;
+		if (IS_ENABLED(CONFIG_DM_ETH_PHY))
+			priv->bus = eth_phy_get_mdio_bus(dev);
 
-		ret = mdio_register_seq(priv->bus, dev_seq(dev));
-		if (ret)
-			return ret;
+		if (!priv->bus) {
+			priv->bus = mdio_alloc();
+			priv->bus->read = axiemac_miiphy_read;
+			priv->bus->write = axiemac_miiphy_write;
+			priv->bus->priv = priv;
+
+			ret = mdio_register_seq(priv->bus, dev_seq(dev));
+			if (ret)
+				return ret;
+		}
+
+		if (IS_ENABLED(CONFIG_DM_ETH_PHY))
+			eth_phy_set_mdio_bus(dev, priv->bus);
 
 		axiemac_phy_init(dev);
 	}
 
+	printf("AXI EMAC: %lx, phyaddr %d, interface %s\n", (ulong)pdata->iobase,
+	       priv->phyaddr, phy_string_for_interface(pdata->phy_interface));
+
 	return 0;
 }
 
@@ -844,8 +859,10 @@
 		offset = fdtdec_lookup_phandle(gd->fdt_blob, node,
 					       "phy-handle");
 		if (offset > 0) {
-			plat->phyaddr = fdtdec_get_int(gd->fdt_blob, offset,
-						       "reg", -1);
+			if (!(IS_ENABLED(CONFIG_DM_ETH_PHY)))
+				plat->phyaddr = fdtdec_get_int(gd->fdt_blob,
+							       offset,
+							       "reg", -1);
 			plat->phy_of_handle = offset;
 		}
 
@@ -857,9 +874,6 @@
 						     "xlnx,eth-hasnobuf");
 	}
 
-	printf("AXI EMAC: %lx, phyaddr %d, interface %s\n", (ulong)pdata->iobase,
-	       plat->phyaddr, phy_string_for_interface(pdata->phy_interface));
-
 	return 0;
 }